This description relates to shared resource arbitration.
In some examples, a digital signal processing (DSP) system includes a shared system bus for accessing a shared resource, such as a shared memory device. To prevent contention or conflict when two or more masters compete for usage of the shared bus at the same time, an arbiter arbitrates requests from the masters and grants one of the masters access to the shared bus. The arbiter can use an arbitration policy based on, e.g., a combination of slot priorities and round robin distribution. At each arbitration cycle (or slot), the arbiter grants the master having the highest priority access of the shared bus. Different masters have the highest priority during different arbitration slots. If a particular master needs more bandwidth, the particular master is assigned a higher priority in more arbitration slots. By varying the percentage of arbitration slots in which particular masters have the highest priority, the amount of usages of the shared bus by the particular masters can be adjusted.